Parity Generator/Checker

One important application of the use of an Exclusive-OR gate is to generate parity.
Parity is used to detect errors in transmitted data caused by noise or other disturbances.
A parity bit is an extra bit that is added to a data word and can be either odd or even parity.
In an even parity system, the sum of all the bits (including the parity bit) is an even number
In an odd parity system the sum of all the bits must be an odd number.
The circuit that creates the parity bit at the transmitter is called the parity generator.
The circuit that determines if the received data is correct is the parity checker.
Parity is good for detecting a single bit error only.
The parity generator and the parity checker can both be built using Exclusive-OR gates.
To generate even parity the bits of data are Exclusive-ORed together in groups of two until there is only a single output left. This output is the parity bit.
To generate odd parity, simply invert the even parity.The last gate can be an Exclusive-NOR gate.
To check parity first a new parity bit must be generated over the date that was received. This parity bit is then compared to the received parity bit. If they are the same, then all is ok. The comparison can be done with an Exclusive-OR gate.
The 74280 is a TTL IC parity generator/checker circuit.